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An Efficient Policy-based Packet Scheduler With Flow Cache

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2 Author(s)
Gao-feng Lv ; Nat. Univ. of Defense Technol., Changsha ; Xiao-ming Zhang

To meet the requirements of parallelism, flexibility and extensibility, the multi-processor elements (PEs) architecture is widely applied in modern network processors (NPs) to support high-speed links of 10 Gbps. Multi-PEs are often organized in parallel to achieve efficient packet forwarding. It's a challenge to schedule the incoming packets from high-speed links to be processed by multiple PEs in parallel. In this paper, we propose policy-based packet scheduler employing flow cache for 10 Gbps NPs. For TCP flows, PPS-FC employs a flow cache, records the mapping relationship between TCP flow bundles and PEs and rates of flow bundles and utilizes the characteristic of flow timeout to design the scheme of cache management Meanwhile, according to the load-balancing indicator sigma(t) the scheduler shifts the high-rate flow bundles of the heavy-loaded PE to the light-loaded PE to preserve load balancing. The effectiveness of the scheduler with the well-chosen design parameters is evaluated by simulation with extrapolated workloads.

Published in:

High Performance Switching and Routing, 2007. HPSR '07. Workshop on

Date of Conference:

May 30 2007-June 1 2007

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