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A parallel architecture for high-bandwidth analog-to-digital conversion is presented. The proposed architecture uses frequency translation along with multi-rate signal processing to digitize a wide-band continuous-time analog signal through an array of identical narrowband analog-to-digital converters (ADCs). The basic idea behind this structure is to decompose the input signal into smaller frequency (channels). Each channel is composed of a two-path system that includes mixers, identical low-pass filters and identical baseband ADCs. The signal in each two-path channel is sampled and digitized into narrowband quadrature signals. After digitizing the signal in each channel, the low-rate subband samples are upconverted back to their respective center frequencies, then filtered and combined to reconstruct the digital representation of the original wide-band input signal. The digital filters are designed to minimize the reconstruction error. The effects of some major nonidealities are discussed. Several simulation results are also presented to demonstrate the performance of the system.
Circuits and Systems II: Express Briefs, IEEE Transactions on (Volume:54 , Issue: 7 )
Date of Publication: July 2007