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40GHz Low Noise Receiver Circuits using BCB Above-Silicon Technology Optimized for Millimeter-wave Applications

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12 Author(s)

This paper presents a low area, low consumption, 40 GHz low noise amplifier (LNA), a down-converter and an oscillator, from which the performance of a 40 GHz wireless receiver can be estimated. The circuits were realized using a post-processing BCB above-IC technology and 0.13 mum SiGe:C BiCMOS HBT process, and their performance are compared with those obtained on circuits without post-processing. The 40 GHz LNA exhibits a noise figure of 2.2 dB with an associated gain of 17 dB and a DC power consumption of 20 mW. The measured double-sideband noise figure of the mixer is 4.7 dB with an associated conversion gain of 6.5 dB and a DC consumption of 4.8 mW. The 40 GHz oscillator has a phase noise of -107 dBc/Hz at 1 MHz offset from the carrier measured on a 50 Ohms load. The oscillator output power is 0 dBm for a DC consumption of 15 mW. Beyond these never published results in term of noise figure at 40 GHz, this post-processing technology gives the opportunity to determine the intrinsic noise figure value of the active device (HBT).

Published in:

Radio Frequency Integrated Circuits (RFIC) Symposium, 2007 IEEE

Date of Conference:

3-5 June 2007