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Influence of Refresh Circuits Connected to Low Power Digital Quasi-Floating Gate Designs

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2 Author(s)
Alfredsson, J. ; Mid Sweden Univ., Sundsvall ; Oelmann, B.

For digital circuits with ultra-low power consumption, floating-gate circuits (FGMOS) have been considered to be a potentially better technique than standard static CMOS circuits. For each new generation of process technology the thickness of the transistor gate-oxide will be reduced. This will increase charge leakage in FGMOS circuits and it is therefore necessary to introduce techniques to keep the charge in the node. In this paper we investigate how the most commonly used refresh circuits (quasi-and pseudo-floating gate) affect the performance when they are connected to an FGMOS circuit working with subthreshold power supply. The simulations show that refresh circuits equal in size compared to FGMOS will not have much influence on performance while it is reduced up to an order in magnitude when the size increase 8 times. This strong impact from the refresh circuitry also indicates that it might not be an option for future technologies.

Published in:

Electronics, Circuits and Systems, 2006. ICECS '06. 13th IEEE International Conference on

Date of Conference:

10-13 Dec. 2006