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A new all-digital circuit scheme for capturing the frequency of an NRZ data stream is described. The proposed scheme is capable of retiming the output clock with the received data within two bit transitions. The absence of analog filters or other analog blocks gives it a much smaller area than conventional circuitry. Also, being fully-digital, it can be described, simulated and synthesized using hardware description languages and be ported to any technology (thus supporting system on a chip designs). Circuit operation and performance was demonstrated using a 0.13 mum, 1.2 V CMOS technology and T-Spicereg simulations.
Date of Conference: 10-13 Dec. 2006