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An Embedded Coherent-Multithreading Multimedia Processor and Its Programming Model

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5 Author(s)
Jui-Chin Chu ; Nat. Univ. of Chung Cheng, Chia-Yi ; Wei-Chun Ku ; Shu-Hsuan Chou ; Tien-Fu Chen
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Multithreading and multi-core processing have been shown to be powerful approaches for boosting a system performance by taking advantage of parallelism in applications. This paper presents a processor design by unifying RISC and multithreading DSP for the sophisticated multimedia applications with advanced standards such as H.264. The proposed design not only minimizes integration costs for embedded multithreading/multi-core design by independent coherent threads, but also reduces the memory bandwidth requirements by one-stop streaming buffer and a very fast data exchange mechanism. With the proposed techniques and appropriate programming model, we can achieve 78% reduction of memory bandwidth and 89% reduction of processing time in H.264 video encoding, compared to traditional single stream micro-processor.

Published in:

Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE

Date of Conference:

4-8 June 2007