Referenced Items are not available for this document.
Time-triggered protocol for the bus and static task scheduling for the CPU are widely used in safety-critical distributed embedded systems. Researchers have presented efficient heuristic algorithms to jointly optimize static task and bus access schedules. In this paper, we use the model checker SPIN to provide a flexible and configurable technique for obtaining provably optimal solutions, and evaluate its performance tradeoffs compared to heuristic algorithms.
Published in:
Design Automation Conference, 2007. DAC '07. 44th ACM/IEEE
Date of Conference: 4-8 June 2007
- Page(s):
- 294 - 299
- ISSN :
- 0738-100X
- Print ISBN:
- 978-1-59593-627-1
- INSPEC Accession Number:
- 9866956
- Conference Location :
- San Diego, CA
- Product Type:
- Conference Publications
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