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Tester architecture for a time-division switch

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2 Author(s)
A. Jajszczyk ; Technical University of Poznan, Institute of Electronics & Communications, Poznan, Poland ; J. Tyszer

A tester architecture for time-space switches as well as the appropriate testing method are proposed. This architecture makes it possible to detect all stuck-type faults in a digital switch in a reasonable time.

Published in:

Electronics Letters  (Volume:23 ,  Issue: 20 )