By Topic

Tester architecture for a time-division switch

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $31
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

2 Author(s)
Jajszczyk, A. ; Technical University of Poznan, Institute of Electronics & Communications, Poznan, Poland ; Tyszer, J.

A tester architecture for time-space switches as well as the appropriate testing method are proposed. This architecture makes it possible to detect all stuck-type faults in a digital switch in a reasonable time.

Published in:

Electronics Letters  (Volume:23 ,  Issue: 20 )