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Monolithic photoreceiver integrating GaInAs PIN/JFET with diffused junctions

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6 Author(s)
J. C. Renaud ; Centre National d''Etudes des Telecommunications, Laboratoire de Bagneux, Bagneux, France ; L. N'Guyen ; M. Allovon ; F. Heliot
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A new integrated PIN/JFET using an original three-layer GalnAs structure has been developed in order to optimise both devices separately. Thanks to the good performances and high reliability of individual components, the sensitivity of such monolithic photoreceivers is ¿ 33.7 dBm for a 10¿9 bit error rate at 140 Mbit/s.

Published in:

Electronics Letters  (Volume:23 ,  Issue: 20 )