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High-speed GaAs 4×4-bit parallel multiplier using super capacitor FET logic

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1 Author(s)
Lowe, K.S. ; Bell-Northern Research, Ottawa, Canada

An ECL-compatible 4×4-bit parallel multiplier implemented using the GaAs D-MESFET logic approach of super capacitor FET logic has been realised. Fully functional circuit operation was obtained with a worst-case multiplication time of 1.4 ns (88 ps/gate) at 1.6 W dissipation, the best speed ever reported for a multiplier fabricated with GaAs MESFET technology.

Published in:

Electronics Letters  (Volume:23 ,  Issue: 8 )