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Serial-data computation on twin pipelines

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4 Author(s)
McGregor, M.S. ; University of Edinburgh, Department of Electrical Engineering, Edinburgh, UK ; Smith, S.G. ; Denyer, P.B. ; Murray, A.F.

The letter describes a novel two-wire data representation for bit-serial architectures. The technique offers twice the data throughput of conventional bit-serial systems at a cost of much less than twice the hardware. In some cases less hardware than the conventional one-wire representation can be used to implement the two-wire representation.

Published in:

Electronics Letters  (Volume:23 ,  Issue: 6 )