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A 109 nW, 44 ppm/°C CMOS Current Reference with Low Sensitivity to Process Variations

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2 Author(s)
De Vita, G. ; Dipt. di Ingegneria dell'' Informazione: Elettronica, Informatica, Telecomunicazioni, Universita degli Studi di Pisa ; Iannaccone, G.

We present the design of a circuit, implemented in a standard 0.35 mum CMOS process, that provides a bias current practically independent of temperature and process variations. Experimental results show that the proposed circuit provides a reference current with a temperature coefficient of 44 ppm/degC over a range from 0 to 80 degC. The reference current is generated by exploiting a MOS transistor as current defining element, instead of a resistor, allowing us to achieve a relative standard deviation due to process variations of 2% . The minimum supply voltage is 1.3 V and the minimum supply current is 36 nA. The line sensitivity is 569 ppm/V. The chip area is 0.035 mm2.

Published in:

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Date of Conference:

27-30 May 2007