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A Low Power Phase-Change Random Access Memory using a Data-Comparison Write Scheme

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6 Author(s)

A low power PRAM using a data-comparison write (DCW) scheme is proposed. The PRAM consumes large write power because large write currents are required during long time. At first, the DCW scheme reads a stored data during write operation. And then, it writes an input data only when the input and stored data are different. Therefore, it can reduce the write power consumption to a half. The 1K-bit PRAM test chip with 128times8bits is implemented with a 0.8mum CMOS technology with a 0.5mum GST cell.

Published in:

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Date of Conference:

27-30 May 2007