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A power management unit (PMU) architecture is proposed for the domain-specific low power management with dynamic voltage and frequency scaling. The PMU continuously co-locks and dynamically varies the supply voltage and the clock frequency from 89 MHz to 200 MHz and from 1.0 V to 1.8 V, respectively, in less than 40mus. A 32bit RISC processor is used as power management target device. The PMU, 0.36mm2 with 0.18-mum CMOS process, consumes 5mW, and shows -100dBm/Hz phase noise of clock and 160mV load regulation of supply voltage with 100mA load current from the load, RISC processor.