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Reducing Energy of DRAM/Flash Memory System by OS-controlled Data Refresh

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4 Author(s)
Moshnyaga, V.G. ; Dept. Electron. Eng. & Comput. Sci., Fukuoka Univ. ; Hua Vo ; Reinman, G. ; Potkonjak, M.

This paper presents a new approach to reduce energy consumption of DRAM/flash memory system by lowering the frequency of DRAM refreshes. The approach is based on two ideas: (1) a DRAM based swap-cache that reduces the number of writes to the flash memory by keeping dirty pages as long as possible; and (2) OS-controlled page allocation/aging policy that stops refreshing for banks, whose pages are clean and not accessed for a long time. Simulations show that the approach can reduce the DRAM refresh energy by 59-74% and the overall energy of DRAM/flash memory system by 8-24% without increase in the execution.

Published in:

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Date of Conference:

27-30 May 2007