A New CMOS 3.1-11.7 GHz Low Power LNA for Ultra-Wideband Wireless Applications

In this paper, a new 3.1 GHz to 11.7 GHz ultra-wide-band (UWB) low-noise amplifier (LNA) is designed in 0.18-μm RF CMOS process. The proposed circuit includes a common-source cascode amplifier followed by an output buffer stage. Special attention is paid to design of inter-stage circuit employing the combined shunt and double-series inductive peaking bandwidth enhancement technique. The amplifier exhibits a forward gain (S21) of 11.0-11.5 dB, a noise figure (NF) of 3.6-4.4 dB, and input return loss (S11) of less than -9.3 dB over the frequency range of 3.1 GHz to 11.7 GHz while consuming only 6.2 mW from a power supply of 1.5 V.