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This paper presents the impact of transient variations on SOI device and circuit behavior. History effects, self heating and charge trapping are considered in partially and fully depleted SOI devices. Modeling approaches for these effects are shown and, based on measurement, extended to the specific issues of emerging SOI technologies. The scaling behavior of self heating is investigated, revealing an increase of the thermal resistance with technology scaling. A simple equivalent circuit model for the charge trapping effect is proposed and verified with measurement data. Simulations based on these models show how transient variations influence the circuit behavior. As an example a 12bit SAR-AD converter is analyzed. The dynamic VT shift of the SOI devices degrades the resolution of the converter.