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Tutorial 6: Design Challenges and Solutions for Nanoscale Memories

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3 Author(s)
Sridhar, Ramalingam ; University at Buffalo, (SUNY), Buffalo, NY ; Elakkumanan, Praveen ; Natarajan, Sreedhar

Static Random-Access Memory (SRAM) is a dominant memory technology for embedded CMOS-memory applications. As device channel lengths shrink down to tens of nanometers, SRAM designs meet new issues and challenges that require changes in the way designs are done. The goal of the tutorial is threefold: 1. Present the design challenges and summarize various circuit-design techniques for low leakage and high performance memory design; 2. A detailed discussion on SRAM failure mechanisms to understand the impact of process variations, soft errors, leakage and noise on different memory operations; the speakers will reexamine these scaling issues, their impact on cell operation and stability, and design for manufacturability within these constraints; and 3. Discuss future and emerging memory technology trends and what they may mean for low power and robustness concerns - with an emphasis on those aspects that are relevant to SRAM designers.

Published in:

Circuits and Systems, 2007. ISCAS 2007. IEEE International Symposium on

Date of Conference:

27-30 May 2007