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Development and Use of Small Addressable Arrays for Process Window Monitoring in 65nm Manufacturing

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5 Author(s)

In this paper we report on the development and use of two scribe-line compatible addressable array test structures in 65 nm technology for routine process window monitoring. One array was dedicated for front-end of line test structures, while a second consists exclusively of back-end test structures. Fast testing allows large-scale sampling of wafer lots in a manufacturing environment. Customized software is used to automate data analysis and calculate figures of merit that enable process and equipment performance to be tracked by process module. Examples of successful application of these arrays in identifying and addressing systematic yield detractors are provided.

Published in:

Microelectronic Test Structures, 2007. ICMTS '07. IEEE International Conference on

Date of Conference:

19-22 March 2007

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