By Topic

Observation of Threshold-Voltage Instability in Single-Crystal Silicon TFTs on Flexible Plastic Substrate

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

3 Author(s)
Yuan, Hao-Chih ; Univ. of Wisconsin, Madison ; Celler, George K. ; Zhenqiang Ma

We report the first observation of threshold-voltage instability of single-crystal silicon (Si) thin-film transistors (TFTs) that are fabricated on low-temperature flexible plastic substrate. Single-crystal Si of 200-nm thickness is transferred from silicon-on-insulator (SOI) onto an indium-tin-oxide-coated polyethylene terephthalate host substrate after selectively removing the buried-oxide layer from the SOI. TFTs of n-type were then fabricated on the transferred single-crystal Si layer with 1.8-mum thick SU-8-2 epoxy as the gate dielectric layer. It is observed that the threshold voltage (Vth) of these TFTs shifts to higher and lower values under high positive and negative gate-voltage stress, respectively. A logarithmic time-dependence of the Vth shift at high bias stress was clearly indicated. These results suggest that the instability of the threshold voltage of the single-crystal Si TFTs is attributed to the charge trapping in the gate dielectric layer.

Published in:

Electron Device Letters, IEEE  (Volume:28 ,  Issue: 7 )