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Efficient modular design of m-out-of-2m TSC checkers, for m=2K1, K>2

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2 Author(s)
Efstathiou, C. ; University of Thessaloniki, Digital Systems & Computers Laboratory, Thessaloniki, Greece ; Halatsis, C.

A very efficient modular design method for m-out-of-2m TSC checkers, for m=2K-1, is described. The checkers are designed using full-adder modules and TSC two-rail code checker modules only. Comparisons are made of the number of MOS transistors required and the size of the test set. The low transistor count and the modular structure of the design favours its VLSI implementation.

Published in:

Electronics Letters  (Volume:21 ,  Issue: 23 )