Via Interconnections for Wafer Level Packaging: Impact of Tapered Via Shape and Via Geometry on Product Yield and Reliability

The wafer level packaging for optical image sensor devices developed by Schott Advanced Packaging utilizes a through silicon via (TSV) by contacting the bond pads of the image sensors from the backside. Direct contact of the bond pads from the back side of the chip offers much shorter transmission paths to the board assemblies, thus providing faster signal speed, lower ohmic contact, efficient thermal conduction and many added advantages. After forming the vias by means of plasma etching, the electrical connection from the bottom of the via to the backside of the wafer is done by spray coating and lithography to form the redistribution layer, and prepare the wafer for bumping at a later process step. Via shape and spray coating process are the key to achieve good quality and reliable product. This paper discusses interactions between the via shape (profile angle and shape) and its effects on subsequent spray coating processes as well as its impact on electrical yield and reliability of the product. The shape of the via, and its homogeneity over the wafer significantly affect the performance and stability of the next process steps, thus careful balancing of the via forming process and the lithography are required. The impact of via morphology and via stability are also studied under production conditions on the spray coating performance.