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High-speed GaAs SCFL monolithic integrated decision circuit for Gbit/s optical repeaters

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2 Author(s)
N. Ohta ; NTT Yokosuka Electrical Communication Laboratory, Yokosuka, Japan ; T. Takada

A high-speed GaAs monolithic integrated decision circuit for Gbit/s optical repeaters, based on source coupled FET logic (SCFL) and designed to be completely ECL-compatible, has been developed. A clock phase margin of 150 degrees at 2 Gbit/s and IC yields of about 60% are achieved by using SCFL configuration. The developed IC operates stably from 10 to 60°C ambient temperature over a supply voltage fluctuation of more than 2 V.

Published in:

Electronics Letters  (Volume:19 ,  Issue: 23 )