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Experimental realisation of a full adder by substrate fed threshold logic structure

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2 Author(s)
Han, C.H. ; Korea Advanced Institute of Science & Technology, Department of Electrical Engineering, Seoul, Korea ; Kim, C.K.

A full adder has been designed and fabricated utilising substrate fed threshold logic. The internal operation is performed by four-valued threshold currents while the input and output signals are of binary form. The delay times of the experimental circuit operating with 10 ¿A per injection window have been measured as 5 ¿s for the sums and 1 ¿s for the carry.

Published in:

Electronics Letters  (Volume:19 ,  Issue: 16 )

Date of Publication:

August 4 1983

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