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InGaAs enhancement-mode MISFETs using double-layer gate insulator

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4 Author(s)
Ishii, K. ; Hokkaido University, Department of Electrical Engineering, Faculty of Engineering, Sapporo, Japan ; Sawada, T. ; Ohno, H. ; Hasegawa, H.

In this letter we describe the fabrication of enhancement-mode MISFETs on InGaAs grown by liquid-phase epitaxy (LPE) using an anodic Al2O3/anodic native oxide double layer as a gate insulator. The normally-off device of 10 ¿m gate length shows the effective channel mobility of 1400 cm2/Vs. The interface state density distribution of this double-layer MIS of InGaAs is also reported. The density of 2 × 1013 cm¿2 eV¿1 at Ec ¿0.057 eV and the minimum of 8 × 1011 cm¿2 eV¿1 near midgap are measured from C/V characteristics.

Published in:

Electronics Letters  (Volume:18 ,  Issue: 24 )