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Browse Journals & Magazines > Electronics Letters ...> Volume:18 Issue:18 Help

Implementation of convolution and Fourier transforms using 1-bit systolic arrays

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2 Author(s)
Ward, J.S. ; University of Durham, Department of Applied Physics & Electronics, Durham, UK ; Stanier, B.J.

The use of systolic arrays of 1-bit cells to implement circular convolution and DFTs is described. The architecture is very well suited to VLSI implementation. It is shown that considerable simplification of the architecture is possible for real-valued DFTs.

Published in:
Electronics Letters  (Volume:18 ,  Issue: 18 )

Date of Publication: September 2 1982

Page(s):
799 - 801
ISSN :
0013-5194
Digital Object Identifier :
10.1049/el:19820541
Product Type:
Journals & Magazines
Date of Current Version :
11 July 2007
Issue Date :
September 2 1982
Sponsored by :
Institution of Engineering and Technology

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