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Relationship between power added efficiency and gate-drain avalanche in GaAs m.e.s.f.e.t.s

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3 Author(s)
S. H. Wemple ; Bell Laboratories, Murray Hill, USA ; M. L. Steinberger ; W. O. Schlosser

Pulse avalanche measurements in the transistor three-terminal configuration reveal a correlation between pulse gate-drain avalanche and power added efficiency. This result, in conjunction with earlier work, points to simple design principles that can be used to maximise efficiency.

Published in:

Electronics Letters  (Volume:16 ,  Issue: 12 )