Easily testable sequential machines with extra inputs and extra outputs

In a recent paper, Fujiwara et al. presented an efficient procedure for designing checking experiments for sequential machines. In this procedure any arbitrary sequential machine is augmented to an easily testable machine by adding only two special input symbols to the original machine. An easily testable machine is defined by the authors as a reduced and strongly connected machine which possesses a distinguishing sequence as well as a synchronising sequence of length [log2 q], and a transfer sequence with a length that is at most [log2 q] to take the machine from a specific state S1, to a state St for all i, where q is the number of machine states, and [r] denotes the smallest integer greater than or equal to r. For a q-state, p-input symbol easily testable machine, the authors' procedure provides an upper bound on the length of the checking experiment that approximately equals pq[log2 q]. Furthermore, the entire checking experiment happens to be preset. This letter reports an extension of the aforementioned work of Fujiwara et al. In the procedure developed through this extension, any arbitrary sequential machine is augmented to an easily testable machine, by adding not two special input symbols alone, but simultaneously adding [log2 q] output terminals to the original machine. This modification gives a reduced upper bound on the lengths of the checking experiments, and also permits coverage of fault types that may cause an increase in the number of machine states.