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Performance Variability of a 90GHz Static CML Frequency Divider in 65nm SOI CMOS

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7 Author(s)
Daihyun Lim ; Massachusetts Institute of Technology, Cambridge, MA ; Jonghae Kim ; Jean-Olivier Plouchart ; Choongyeun Cho
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A static CML divide-by-2 frequency divider is integrated in 65nm SOI CMOS. The maximum operating frequency is 90GHz while dissipating 52.4mW. The self-oscillation frequency is 92GHz with 0.57pJ switching energy. Measurement of self-oscillation frequency at multiple bias conditions enables estimation of the variation in threshold voltage, capacitance, and resistance.

Published in:

2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers

Date of Conference:

11-15 Feb. 2007