A 1/2.5 inch 8.1Mpixel CMOS image sensor with 1.75mum pixel pitch is designed to operate at 2.8V for digital still camera applications and down to 2.4V in mobile applications. The chip uses top and bottom multiple channels with a double-data-rate analog signal readout at a rate of 96Mpixels/s, which results in total 192Mpixels/s. With the analog gain set to 15.875 and a 12b ADC the noise floor falls as low as 3.8e-, yielding a pixel DR of 63.8dB
Published in:
Solid-State Circuits Conference, 2007. ISSCC 2007. Digest of Technical Papers. IEEE International
Date of Conference: 11-15 Feb. 2007