Referenced Items are not available for this document.
In this paper, we present optimized methodology for Intra-task voltage scheduling. Our proposed method gets data flow and control flow of application that represents coloration between different parts of the application at the early stage of design using UML-RT model and decides to schedule processor's voltage. By applying this technique on JPEG encoder system experimental results show reduction in energy consumption by 18-54 % over common Intra-DVS algorithm.
Published in:
Computer Systems and Applications, 2007. AICCSA '07. IEEE/ACS International Conference on
Date of Conference: 13-16 May 2007
- Page(s):
- 500 - 505
- E-ISBN :
- 1-4244-1031-2
- Print ISBN:
- 1-4244-1030-4
- INSPEC Accession Number:
- 9854946
- Conference Location :
- Amman
- Digital Object Identifier :
- 10.1109/AICCSA.2007.370928
- Product Type:
- Conference Publications
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