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QUKU: A FPGA Based Flexible Coarse Grain Architecture Design Paradigm using Process Networks

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3 Author(s)
Shukla, S. ; Inf. Technol. & Electr. Eng., Queensland Univ., St. Lucia, Qld. ; Bergmann, N.W. ; Becker, J.

DSP applications can be suitably represented using process network models. This paper uses a modification of Kahn process network to solve the problem of finding an optimum architectural template for coarse grain array on per application basis. By applying the model at architectural level in QUKU, better hardware efficiency is achieved for a wide domain of applications. A few widely used DSP algorithms have been presented to demonstrate the application of process network models into architectural template generation in QUKU.

Published in:

Parallel and Distributed Processing Symposium, 2007. IPDPS 2007. IEEE International

Date of Conference:

26-30 March 2007