By Topic

FPGA Architecture for RF Transceiver System and Mixed-Signal Low Cost Tests

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$33 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

5 Author(s)
Koren, I. ; Infineon Technol. AG, Munich ; Demmerle, F. ; May, R. ; Kaibel, M.
more authors

Standard automated test equipment (ATE) for radio frequency (RF) transceiver production testing of today is limited by digital signal processing and data transfer. These constraints can be considerably relaxed by the application of new technology based on field programmable gate array (FPGA). The methods proposed are capable of handling all tasks flexibly and at-speed. FPGA hardware resources are embedded into available ATE environment and support modular signal processing as well as highspeed interfacing. Avoiding any ATE upgrades, the costs for RF transceiver production testing can be driven to an absolute minimum that is achievable.

Published in:

Test Symposium, 2007. ETS '07. 12th IEEE European

Date of Conference:

20-24 May 2007