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Communications to, or between, low-end microprocessors within a product always comes at a cost. This paper develops a new, economic solution that will be useful in a variety of cost-sensitive applications. This paper starts by identifying the properties of an inter-microprocessor communications system that adds minimal cost to a product and enables the use of lower price microprocessors. This leads us to introduce a new category of communications called time independent asynchronous (TIA) communications. An economic 2-wire TIA communications protocol is developed and described using timing diagrams. The protocol is modeled using signal transition graphs (STGs), which are found to have some limitations, and so a modification is developed called STG for threads (STG-FT). Two-wire TIA is simulated to confirm livelock and deadlock properties. An implementation is created that verifies the simulation results, and the performance is reported. Finally, a novel application of 2-wire TIA is discussed.
Date of Publication: May 2007