A Novel Implementation of the IEEE802.11 Medium Access Control

This work presents some new optimization approaches to implementation of medium access control (MAC) layer of IEEE 802.11 wireless networking protocol using general purpose DSP and gate array systems. Optimization starts at design level. The hardware/software partitioning of the MAC's architecture is optimized in the sense of minimal implementation burden, while maintaining the system's functionalities and performance. The proposed partitioning and implementation technique obviates the use of any real time operating system (RTOS), which leads to a simple, high speed, and low memory structure of the MAC's software. Also, solutions such as using hash tables and pipeline processing are given and employed to gain a higher speed. The software section is implemented on the popular, low price DSP of TI's C54 processor, whereas the hardware implementation is realized using Virtex2vp30 from Xilinx