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Spacer-First Damascene-Gate FinFET Architecture Featuring Stringer-Free Integration

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6 Author(s)
Cornu-Fruleux, F. ; Inst. d''Electron., Villeneuve d''Ascq ; Penaud, J. ; Dubois, E. ; Coronel, P.
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This letter presents a new Damascene-gate FinFET process that inherently suppresses stringers, resulting from gate and spacers patterning. The so-called spacer-first integration scheme relies on the engineering of a hydrogen silsesquioxane layer by electron beam lithography followed by two selective compartmentalized development steps to successively release the Damascene-gate cavity and the source/drain (S/D) contact regions. In contrast to the existing gate-first and gate-last integration approaches, the resulting FinFET process does not impose any restriction or interdependency on the sizing of the fins, gate, spacers, and S/D regions. A complete morphological and electrical validation is proposed in the particular case of wrap-around self-aligned metallic Schottky S/D contacts.

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Electron Device Letters, IEEE  (Volume:28 ,  Issue: 6 )