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Fast Statistical Circuit Analysis with Finite-Point Based Transistor Model

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4 Author(s)
Min Chen ; Arizona State Univ., Phoenix, AZ ; Wei Zhao ; Liu, F. ; Yu Cao

A new approach of transistor modeling is developed for fast statistical circuit simulation in the presence of variations. For both I-V and C-V characteristics of a transistor, finite data points are identified by their physical meaning; the impact of process and design variations is embedded into these points as closed-form expressions. Then, the entire I-V and C-V are extrapolated using polynomial formulas. This novel approach significantly enhances the simulation speed with sufficient accuracy. The model is implemented in Verilog-A at 65nm node. Compared to simulations with the BSIM model, the computation time can be reduced by 7times in transient analysis and 9times in Monte-Carlo simulations

Published in:

Design, Automation & Test in Europe Conference & Exhibition, 2007. DATE '07

Date of Conference:

16-20 April 2007