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At-Speed Testing of Core-Based System-on-Chip Using an Embedded Micro-Tester

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3 Author(s)
Matthieu Tuna ; University Pierre et Marie Curie, LIP6, France ; Mounir Benabdenbi ; Alain Greiner

In SoC designs, limited test access to internal cores, low-cost external tester's lack of accuracy and slow frequencies make application of at-speed tests impractical. Therefore, this paper presents an embedded micro-tester for testing IEEE1500-compliant SoCs. In the proposed approach, the test program is no more executed by the external tester but by the embedded micro-tester. Under the control of the embedded SoC microprocessor, the micro-tester executes the test programs stored outside of the SoC in an external memory. The micro-tester supports stuck-at testing as well as both at-speed testing techniques: launch-on-last-shift (LOLS) and launch-on-capture (LOC). Using the ITC'02 benchmarks, experimental results are presented: test application time, test data volume and area overhead

Published in:

25th IEEE VLSI Test Symposium (VTS'07)

Date of Conference:

6-10 May 2007