Code-Density Test of Analog-to-Digital Converters Using Single Low-Linearity Stimulus Signal

High-precision ADC testing is a challenging problem because of its stringent requirement on test signal's linearity. This work introduces a method using a nonlinear stimulus signal for testing linearity of high-resolution cyclic and pipelined ADCs by exploiting their architecture information. Simulation and experiments show that 16-bit ADCs can be tested to 1-LSB accuracy by using a 7-bit linear signal. This approach provides a solution to both the production and on-chip testing problems of high-resolution ADCs.