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NoC Communication Strategies Using Time-to-Digital Conversion

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5 Author(s)

A radical approach to high-speed on-chip communication between computational modules is proposed. Data communication is performed over multiple serial buses, where the time difference between events is used to encode and decode data on a number of wires. We present results obtained through a proof-of-concept implementation on FPGA and simulations on a 0.18mum technology

Published in:

First International Symposium on Networks-on-Chip (NOCS'07)

Date of Conference:

7-9 May 2007