Cart (Loading....) | Create Account
Close category search window

Interconnect Delay and Power Optimization by Module Duplication for Integration of High Level Synthesis and Floorplan

Sign In

Cookies must be enabled to login.After enabling cookies , please use refresh or reload or ctrl+f5 on the browser for the login options.

Formats Non-Member Member
$31 $13
Learn how you can qualify for the best price for this item!
Become an IEEE Member or Subscribe to
IEEE Xplore for exclusive pricing!
close button

puzzle piece

IEEE membership options for an individual and IEEE Xplore subscriptions for an organization offer the most affordable access to essential journal articles, conference papers, standards, eBooks, and eLearning courses.

Learn more about:

IEEE membership

IEEE Xplore subscriptions

4 Author(s)
Zhipeng Liu ; Dept. of Comput. Sci. & Technol., Tsinghua Univ., Beijing ; Jinian Bian ; Qiang Zhou ; Hui Dai

This article proposes an efficient algorithm by module duplication for integration of high-level synthesis and floorplan to optimize the interconnect delay and power. Module duplication can bring down the interconnect wire length among physical modules, thereby further reducing the interconnect delay and power. With the proper generosity of the area constraint, incremental high-level synthesis and floorplan procedures are proposed to perform iteratively for finding the best place for the duplicated module to be inserted. The key contribution of the algorithm lies in the fact that our designs are 20.8% more interconnect delay-efficient and 12.5% more interconnect power-efficient over the results produced by original design methods

Published in:

VLSI, 2007. ISVLSI '07. IEEE Computer Society Annual Symposium on

Date of Conference:

9-11 March 2007

Need Help?

IEEE Advancing Technology for Humanity About IEEE Xplore | Contact | Help | Terms of Use | Nondiscrimination Policy | Site Map | Privacy & Opting Out of Cookies

A not-for-profit organization, IEEE is the world's largest professional association for the advancement of technology.
© Copyright 2014 IEEE - All rights reserved. Use of this web site signifies your agreement to the terms and conditions.