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A Dual Low Power 1/2 LSB NL 16b/1Msample/s SAR A/D Converter with on-chip Microcontroller

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3 Author(s)
Leung, K.Y. ; Silicon Lab. Inc., Austin ; Kafai Leung ; Holberg, D.R.

A 0.35 mum double-poly CMOS 16 b SAR A/D converter uses self-calibration techniques to obtain frac12 LSB INL. The differential and single-ended THD at 1Msample/s are 101dB and 96 dB, respectively. Each ADC consumes 20 mW at 3 V and occupies 2.9 mm2 active area, resulting in a 0.9 pJ/b FOM. The chip includes 3 ADCs, 2 DACs, 8051-microcontroller, CAN controller, DMA controller, 64 K flash memory and 4 K RAM occupying 26 mm2.

Published in:

Solid-State Circuits Conference, 2006. ASSCC 2006. IEEE Asian

Date of Conference:

13-15 Nov. 2006

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