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Numerical Function Generators Using Edge-Valued Binary Decision Diagrams

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3 Author(s)
Nagayama, S. ; Dept. of Comput. Eng., Hiroshima City Univ. ; Sasao, T. ; Butler, J.T.

In this paper, we introduce the edge-valued binary decision diagram (EVBDD) to reduce the memory and delay in numerical function generators (NFGs). An NFG realizes a function, such as a trigonometric, logarithmic, square root, or reciprocal function, in hardware. NFGs are important in, for example, digital signal applications, where high speed and accuracy are necessary. We use the EVBDD to produce a fast and compact segment index encoder (SIE) that is a key component in our NFG. We compare our approach with NFG designs based on multi-terminal BDDs (MTBDDs), and show that the EVBDD produces SIEs that have, on average, only 7% of the memory and 40% of the delay of those designed using MTBDDs. Therefore, our NFGs based on EVBDDs have, on average, only 38% of the memory and 59% of the delay of NFGs based on MTBDDs.

Published in:

Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific

Date of Conference:

23-26 Jan. 2007