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Robust Analog Circuit Sizing Using Ellipsoid Method and Affine Arithmetic

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5 Author(s)
Xuexin Liu ; Dept. of Microelectron., Fudan Univ., Shanghai ; Wai-Shing Luk ; Yu Song ; Tang, P.
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Analog circuit sizing under process/parameter variations is formulated as a mini-max geometric programming problem. To tackle such problem, we present a new method that combines the ellipsoid method and affine arithmetic. Affine arithmetic is not only used for keeping tracks of variations and correlations, but also helps to determine the sub-gradient at each iteration of the ellipsoid method. An example of designing a CMOS operational amplifier is given to demonstrate the effectiveness of the proposed method. Finally numerical results are verified by SPICE simulation.

Published in:

Design Automation Conference, 2007. ASP-DAC '07. Asia and South Pacific

Date of Conference:

23-26 Jan. 2007