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Hardware Architecture Exploration of IEEE 802.11n Receiver Using SystemC Transaction Level Modeling

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2 Author(s)
Jin Lee ; Inf. & Commun. Univ. ; Sin-Chong Park

This paper gives an overview of a transaction level modeling (TLM) design flow for the hardware architecture exploration with SystemC. TLM is widely used for hardware-software codesign, since the objective of TLM is the system exploration in the early stage of the design with fast but accurate simulation with abstracted transaction between modules in system. In this paper, we exploit the concept of TLM for the hardware architecture exploration. SystemC description methodology for TLM is described and the hardware architecture exploration of IEEE 802.11n PHY receiver is presented.

Published in:

Advanced Communication Technology, The 9th International Conference on  (Volume:3 )

Date of Conference:

12-14 Feb. 2007