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Improved Reversed Nested Miller Frequency Compensation Technique With Voltage Buffer and Resistor

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4 Author(s)
Grasso, A.D. ; Dipt. di Ingegneria Elettrica, Elettronica e dei Sistemi Elettrotecnica, Catania Univ. ; Marano, D. ; Palumbo, G. ; Pennisi, S.

This brief introduces and develops a novel frequency compensation technique for three-stage operational transconductance amplifiers. The new compensation topology exploits a voltage buffer and a nulling resistor to achieve a double pole-zero cancellation, occurring beyond the gain-bandwidth product. To verify the effectiveness of the compensation scheme, an amplifier has been fabricated in a standard 0.5-mum CMOS process. Experimental measurements are found to be in good agreement with the theoretical analysis and show an improvement in small-signal and large-signal performances

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Circuits and Systems II: Express Briefs, IEEE Transactions on  (Volume:54 ,  Issue: 5 )