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We developed our theoretical noise model to account for the temporal noise in active pixels, and then found out the optimum design parameters such as fillfactor, each size of the three transistors (reset transistor, source follower, row selection transistor) comprising active pixels, bias current, and load capacitance that can have the maximum signal-to-noise ratio. To develop the theoretical noise model in active pixels, we considered the integration noise of the photodiode and the readout noise of the transistors related to readout. During integration, the shot noise due to the dark current and photocurrent, during readout, the thermal and flicker noise were considered. The developed model can take the input variables such as photocurrent, capacitance of the photodiode, integration time, transconductance of the transistors, channel resistance of the transistors, gate-to-source capacitance of the follower, and load capacitance etc. And, to validate our noise model, test structures have been realized. The size of the designed pixels is 20 mum for high resolution X-ray imaging. In these test structures, AMIS 0.5 mum (2P/3M) CMOS standard process are used for fabrication and different values for design parameters (including optimum design parameters extracted from the developed model) are considered. The results of the noise measurement agree with model calculation.