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Inter-Processor Communication Performance of a Hierarchical Torus Network under Bit-Flip Traffic Patterns

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3 Author(s)
Rahman, M.M.H. ; Dept. of Comput. Sci. & Eng., KUET, Khulna ; Ghosh, M. ; Horiguchi, S.

In this paper, we present a deadlock-free routing algorithm for the hierarchical torus network (HTN) using 2 virtual channels - 2 being the minimum number for dimension order routing - and evaluate the network's inter-processor communication performance under the bit-flip traffic pattern using the proposed routing algorithm. We evaluate the inter-processor communication performance of HTN, H3D-mesh, TESH, mesh, and torus network by computer simulation. It is shown that the inter-processor communication performance of the HTN is better than that of the H3D-mesh, TESH, mesh, and torus networks.

Published in:

Electrical and Computer Engineering, 2006. ICECE '06. International Conference on

Date of Conference:

19-21 Dec. 2006