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Numerical Function Generators Using LUT Cascades

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3 Author(s)
Sasao, T. ; Dept. of Comput. Sci. & Electron., Kyushu Inst. of Technol., Fukuoka ; Nagayama, S. ; Butler, J.T.

This paper proposes an architecture and a synthesis method for high-speed computation of fixed-point numerical functions such as trigonometric, logarithmic, sigmoidal, square root, and combinations of these functions. Our architecture is based on the lookup table (LUT) cascade, which results in a significant reduction in circuit complexity compared to traditional approaches. This is suitable for automatic synthesis and we show a synthesis method that converts a Matlab-like specification into an LUT cascade design. Experimental results show the efficiency of our approach as implemented on a field-programmable gate array (FPGA)

Published in:

Computers, IEEE Transactions on  (Volume:56 ,  Issue: 6 )

Date of Publication:

June 2007

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