Guideline for Low-temperature-operation Technique to Extend CMOS Scaling

Low temperature device operation at 240 - 300 K temperature range is a promising approach to extend the device technology. The guideline of device design for Cooling CMOS and the optimum operation temperature considering total power consumption is discussed for the first time. Also, the compatibility of Cooling CMOS with advanced high-k gate dielectrics and embedded SiGe S/D technique are clarified.